| MAGIC VOICE | WAV to MVM |
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Allgemeines General |
Einführung Introduction |
Anschluss Connection |
Anwenden des Moduls Using the Module |
Vokabular Vocabulary |
Tips & Tricks Tips & Tricks |
| Ergänzendes Additional stuff |
Demos Demos |
Spiele Games |
Zeitschriften Magazines |
Sprach Downloads Speech Downloads |
Lexikon Lexicon |
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| Internes Internal |
Hardware Hardware |
Firmware Firmware |
Sprachdaten Speechdata |
Bit-Format Bit allocation |
De-/Codierung De-/Coding |
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| Nützliches und mehr Utilities and more |
Speech Playtool | Magic Game Cart | Magic Talkie | Magic Voice NT | Ersatzteile & Reparatur Spares & Repair |
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| Wave to Magic Voice - Sprachdaten selbst erzeugen |
| Document: | US Patent Number 4209844 |
| Title: | Lattice filter for waveform or speech synthesis circuits using digital logic |
| Abstract: | A digital filter of the type which may be used in circuits for generating complex waveforms, such as human speech. The filter has a multiplier, an adder coupled to the output of the multiplier and various delay circuits coupled to the output of the adder. A latch memory is coupled to the output of one of the delay circuits. Switching circuits are provided for the output of the delay and the latch memory to inputs of the multiplier and the adder to selected times. Coefficients of the filter are preferably stored in a memory coupled to another input of the multiplier. The excitation signal is coupled to the adder in one embodiment and to the multiplier in another embodiment. In either embodiment, the digital filter may be implemented on a single integrated circuit chip. |
| Source: | 4209844 |
| Document: | US Patent Number 4970659 |
| Title: | Learning aid or game having miniature electronic speech synthesis chip |
| Abstract: | An electronic hand-held, talking learning aid is disclosed. The learning aid includes a MOS speech synthesizer chip having an active surface area on the order of 45,000 square mils. The disclosed speech synthesizer chip includes a digital lattice filter, a voiced/unvoiced excitation circuit, a speech parameter interpolator, an input parameter decoder, a digital-to-analog converter and associated timing circuits. The learning aid is also provided with a microprocessor which functions as a controller for controlling the operation of the unit. A small speaker is driven by the digital-to-analog converter on the speech synthesis chip and a keyboard and display device are strobed by the microprocessor controller. Features include modes in which a speech synthesizer recites instructions or questions to the operator who must properly respond. |
| Source: | 4970659 |
| Document: | This paper appears in: Acoustics, Speech, and Signal Processing [see also IEEE Transactions on Acoustics, Speech and Signal Processing] Publication Date: February 1983, Volume: 31, Issue: 1, On page(s): 329-334, ISSN: 0096-3518 |
| Title: | C²MOS speech synthesis systems |
| Authors: | Fuminari Tanaka, Hiroshi Shigehara, Hiroaki Suzuki, Yasoji Suzuki, Ichizoh Takimoto Toshiba Corporation, Kawasaki, Japan |
| Abstract: | Employing an updated C²MOS technique, two types of speech synthesizer LSI circuits, based on the PARCOR and the ADM methods,
are introduced and described. These two LSI circuits, fabricated with a standard metal gate CMOS process, have several features. 1) They can be operated with a single power supply over a 3-7 V range. 2) Their power dissipations are, respectively, 0.6 mW (PARCOR) and 0.18 mW (ADM) with the supply at 3 V. 3) High accuracy 9- and 10-bit R, 2R D/A converters are constructed in each LSI circuit. In the PARCOR system, various high quality and low data rate speech outputs are obtainable. The ADM system is used for voice transmission and synthesis. By adequately applying these two systems to the wide needs in the market, it is possible to achieve good cost performance. |
| Source: | IEEE 1164056 |
| Document: | This paper appears in: Solid-State Circuits Conference. Digest of Technical Papers. 1982 IEEE International Publication Date: February 1982, Volume: XXV, On page(s): 266 - 267 |
| Title: | C²MOS speech synthesis systems |
| Authors: | Fuminari Tanaka, Hiroshi Shigehara, Hiroaki Suzuki, Yasoji Suzuki, Ichizoh Takimoto, Y. Saeki, I. Sasaki, Y. Iwamoto,
S. Itoh, K. Takamori, H. Sekiguchi Toshiba Corporation, Kawasaki, Japan |
| Abstract: | This paper will cover two speech synthesizer LSIs developed in C²MOS technology. One uses the partial autocorrelation (Parcor) algorithm and the other is based on adaptive delta modulation. The power dissipation is only 0.6 and 0.18mW, respectively. |
| Source: | IEEE 1156313 |