MAGIC VOICE

Hardware

	Allgemeines General	Einführung Introduction	Anschluss Connection	Anwenden des Moduls Using the Module	Vokabular Vocabulary	Tips & Tricks Tips & Tricks
	Ergänzendes Additional stuff	Demos Demos	Spiele Games	Zeitschriften Magazines	Sprach Downloads Speech Downloads	Lexikon Lexicon
	Internes Internal	Hardware Hardware	Firmware Firmware	Sprachdaten Speechdata	Bit-Format Bit allocation	De-/Codierung De-/Coding
	Nützliches und mehr Utilities and more	Speech Playtool	Magic Game Cart	Magic Talkie	Magic Voice NT	Ersatzteile & Reparatur Spares & Repair

Die Hardware des Magic Voice Moduls.

The Hardware of the Magic Voice Module.

Hard- und Softwareversionen - Hard- and Software versions

Das Magic Voice Modul gibt es nur in einer Hard- und Softwareversion. Die Platine ist mit ASSYNO. 250427, FABNO. 251484 REV.1 gekennzeichnet. Das EPROM hat die MOS-Nummer 251476.

There exists only one hard- and software version of the Magic Voice Module. The board is labeled with ASSYNO. 250427, FABNO. 251484 REV.1 The EPROM has the MOS number 251476.

Seriennummer - Serial number	Hardwareversion
Die Seriennummer des Moduls steht auf der Gehäuseunterseite. The serial number can be found at the bottom of the module.	Die Angaben zur Hardware sind auf der Platine aufgedruckt. The information about the hardware is printed on the circuit board.

Offensichtlich wurden auch eine ganze Menge Module ohne jegliche Seriennummer verkauft. Versionen: (Tabelle sortiert nach Seriennummer) Ein + bedeutet, dass alle großen ICs (T6721/6525/EPROM/LA05) gesockelt sind.

Obviously, a lot of modules have been sold without any serial number. Versions: (Table sorted by serial number) A + indicates that all major ICs (T6721/6525/EPROM/LA05) are socketed.

Modul	Sockel	.
Serial No.	Sockets	Bemerkung - Remark
?	?	Lowest known Ser.No.
HK 001393	+	.
HK 010839	+	Jogi
HK 010915	+	sauhund
HK 014961	+	Stefan67
?	?	Highest known Ser.No.
Label fehlt - without label	+
Label fehlt - without label	-	Jogi, alle großen ICs ursprünglich eingelötet, selbst mit Sockeln versehen

Blick in das Innere - View inside

Bild: Danny O'Day Quelle: Secret Weapons of Commodore	Bilder: Joachim Nemetz Quelle: VIC20.de - Magic Voice
6525 B, LA05-123, MOS-ROM	6525 A, LA05-124, 27128 Eprom	6525 A, LA05-124, 27128 Eprom

Ab einer bestimmten Seriennummer wurden die großen ICs nicht mehr gesockelt. Ein weiterer Unterschied ist die Bestückung mit einem MOS-ROM oder Eprom. Der LA05 ist in der Version -123 und -124 vorzufinden. Der MOS 6525 wurde als A und B Version verbaut.

From a specific serial number, the large ICs were not socketed anymore. Another difference is the assembly with a MOS-ROM or EPROM. The LA05 is to be found in version -123 and -124. The MOS 6525 was installed as the A and B version.

Jumper:

JP1: closed, VCC to Eprom Pin 1 (Vpp)
JP2: closed, VCC to Eprom Pin 27 (/PGM)

Schaltplan und Bauteile - Schematic and components

 Schaltplan - Schematic:

Version 0.96.a - 22. August 2012 - Joachim Nemetz (294 KB)

Version 0.97a - 02. September 2012 - Stefan Uhlmann (24 KB)

 Stückliste - Parts list:

Stück Quantity	Ref.	Wert/Typ Value/Type	Gehäuse Housing	Bezeichnung Designation	Bemerkung Remark
1	U1	CD40105BE	DIP 16	FIFO register	4-bit x 16-word FIFO register, also 74HCT40105
1	U2	MOS 6525	DIP 40	Tri-Port Interface (TPI) with interrupt control MOS and CSG	6525A (2 MHz) = MOS 901343-01 6525B (3 MHz) = MOS 901979-03
1	U3	LA05-124	DIP 28	Uncommitted Logic Array	auch LA05-123, customer design
0	U4	-	DIP 20	- entfallen - dispensed -	U3 = PAL16L8 (adress decoder) and U4 = PAL16R4 (parallel-serial-converter) used in the prototype have been replaced with the mask programable Gate Array LA05 in the production unit
1	U5	T6721A	DIP 42	Speech Synthesizer	CMOS, Manufacturer: Toshiba America Electronic Components, Inc. T6721AP (DIP 42 pin) Part# 27901026 T6721AF (FLAT 56 pin) Part# 22117707
1	U6	MOS 251476 Eprom 27128	DIP 28	Eprom	251476-01, 16384 word x 8 bit, 16KB
1	U7	74LS257	DIP 16	Quad 2-Input Multiplexer	901521-57, Vier 2 zu 1 Datenselektoren
1	Q1	PN2222	TO-92	NPN Transistor	902686-01 (2N2222, TO-18), General Purpose Transistor, FPN2222
1	Y1	640 KHz	RM 5,08 mm	Keramik Resonator - Ceramic Resonator	640 KHz, 2 Pin
1	R4	300 Ω	0207	Widerstand - Resistor	Kohleschicht - carbon composition, Baugröße: (DxL 2,3x6,0mm), 0,25 Watt, ±5%
1	R5	470 Ω	0207	Widerstand
1	R3	1 kΩ	0207	Widerstand
3	R9, R10, R11	4,7 kΩ	0207	Widerstand
1	R1	5,1 kΩ	0207	Widerstand
5	R2, R6, R7, R8, R12	10 kΩ	0207	Widerstand
2	C1, C2	100 pF	RM 5,08 mm (*1)	Kondensator - Capacitor	Keramik - Ceramic
4	C3, C9, C11, C13	10 nF	RM 5,08 mm	Kondensator	Keramik
1	C4	6,8 nF	RM 5,08 mm	Kondensator	Keramik
3	C5, C6, C12	100 nF	RM 5,08 mm	Kondensator	Keramik
1	C8	0,47 μF	RM 5,08 mm	Kondensator	Elektrolyt - Electrolytic
2	C7, C10	10 μF	RM 5,08 mm	Kondensator	Elektrolyt
3	FB1, FB2, FB3	Z @ 10MHz 28Ω	-	Ferritperle - Ferrite Bead	EMV Ferrit-Entstörfilter axial, ø 3,5 x 4,5 mm
1	J1		-	Modulschacht - Cartridge Slot	Card Edge Slot Connector 44 pin, Modul-Port des Magic Voice 2x22 Pin, RM = 2,54 mm / 0,100"
2	J2, J3		-	Audio Buchse - Audio Socket	Cinch RCA Buchse, RCA Jack J2 = IN = red, J3 = OUT = black

Note:
(*1) The PCB Board is designed with a pitch of 0,2" (5,08 mm) for all capacitors, but used are mostly 0,1" (2,54 mm) parts.

Integrierte Schaltungen - Integrated circuits

T6721A - Toshiba, Voice Synthesizing LSI, Speech Generator, PARCOR Voice Synthesizer

(AF = 56 Pin QFP Package, AP = 42 Pin DIP Package)

- Voice synthesizing system of PARCOR type. 8 kHz sampling voice output
- Easy connection to a microcomputer
- Synthesizing conditions can be selected and speed of speech is changeable
- Built-in voltage type 9-Bit DA converter

Datenblatt - Datasheet

T6721A (1679 KB)

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MOS 6525 - MOS, Tri Port Interface

- 24 programmierbare E/A-Leitungen oder
- 16 programmierbare E/A-Leitungen. 2 Handshake-Leitungen und 5 Unterbrechungseingänge
- Prioritätensteuerung der Unterbrechungen abschaltbar
- automatischer Handshake
- 8 adressierbare Register

Datenblatt - Datasheet

MOS_6525 (884 KB)

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LA05 - General Instrument Corporation, High Speed CMOS Uncommitted Logic Array

Programmierbares Logiknetz, 560 Gates, Customer Design

8343SEA

The customer's circuit is built up using standard cells. The cell library includes:
- Simple gates (AND, OR, NAND, NOR, EXOR, etc.)
- Latches
- Decoders
- Shift Registers
- Arithmetic Elements
- Input Buffers
- Output Buffers

Datenblatt - Datasheet

GI_ULAs (938 KB)

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MOS 251476 / 27128 - 16 KByte Eprom

131 072-Bit (16384-Word by 8-Bit) erasable and electrically reprogrammable ROM

-

ROM-Datei siehe Firmware-Seite - ROM-File see Firmware-Page

Datenblatt - Datasheet

M5L27128K (396 KB)

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CD40105BE - 4-Bit x 16-Word FIFO Register

The 40105 is capable of handling input and output data at different shifting rates. This feature makes it particularly useful as a buffer between asynchronous systems.

- Independent asynchronous inputs and outputs
- Expandable in either direction
- Reset capability
- Status indicators on inputs and outputs
- 3-state outputs

Datenblatt - Datasheet

40105 (201 KB)

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74LS257 - Vierfach 2 zu 1 Selektor/Multiplexer mit Tri-State-Ausgängen

- Non-Inverting 3-State Outputs

Datenblatt - Datasheet

SN74LS257 (76 KB)

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PN2222 - Transistor

- NPN Epitaxial Silicon Transistor

Datenblatt - Datasheet

PN2222 (26 KB)

6525 Tri-Port Interface

Das Tri-Port Interface verfügt über zwei Betriebsmodi: Modus 0: Drei 8-Bit I/O-Ports (= 24 individuell programmierbare I/O-Leitungen) Modus 1: Zwei 8-Bit I/O-Ports (= 16 individuell programmierbare I/O-Leitungen) und 5 prioritäts Interrupt-Eingänge, einen Interrupt Meldeausgang und 2 steuerbare Handshake-Leitungen Im Magic Voice wird das Interface im Modus 1 betrieben. Die Zellen in der Tabelle sind mit Hintergrundfarbe wie folgt gekennzeichnet:  C64-Adresse   blau,    Eingang   grün,    Ausgang   rot,    Unbenutzt   dunkelgrau

The TRI-port interface has two operating Modes: Mode 0: Three 8-bit I/O ports (= 24 individually programmable I/O lines) Mode 1: Two 8-bit I/O ports (= 16 individually programmable I/O lines) and 5 priority interrupt inputs, an interrupt signalling output and 2 controllable handshake lines In the Magic Voice the interface is used in Mode 1. The cells in the table are marked with background color as follows:  C64-Address   blue,    Input   green,    Output   red,    Unused   dark grey

C64-Adresse	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0	Bemerkung
$DF80	PA 7	PA 6	PA 5	PA 4	PA 3	PA 2	PA 1	PA 0	PRA - Port Register A
Function:	Status DIR	Status /EOS	/GAME	SI	D3	D2	D1	D0	OUT: D0..D3 Data through 40105/LA05 to T6721 (highest Nibble first) OUT: SI = Shift in to FIFO (L->H "Pretty Please") IN: /GAME of the MV-Modulport IN: /EOS = End of Speech from T6721 IN: DIR = Data in Ready from 40105
$DF81	PB 7	PB 6	PB 5	PB 4	PB 3	PB 2	PB 1	PB 0	PRB - Port Register B
Function:	/EXROM	?	?	/WR	D3	D2	D1	D0	OUT: D0..D3 Data to T6721 (highest Nibble first) OUT: /WR to T6721 (L->H "Pretty Please") OUT: ? PB 5 OUT: ? PB 6 IN: /EXROM of the MV-Modulport
$DF82	(PC 7) CB	(PC 6) CA	(PC 5) /IRQ	(PC 4) IL 4	(PC 3) IL 3	(PC 2) IL 2	(PC 1) IL 1	(PC 0) IL 0	(Mode 0: PRC - Port Register C) Mode 1: Handshake and Interrupt Latches
Function:	/EXROM	0=RAM 1=EPROM	C64 /NMI	-	Data in Ready	End of Speech	-	-	Bit 0..4 Interrupt Inputs, Bit 5..7 Outputs IN: /EOS IN: DIR OUT: /NMI (automatically generated if /EOS or DIR occurs) OUT: ? CA OUT: /EXROM of the C64-Port
$DF83	DA 7	DA 6	DA 5	DA 4	DA 3	DA 2	DA 1	DA 0	DDRA - Data Direction Register Port A
Value:	0	0	0	1	1	1	1	1	0=Input, 1=Output ($1F)
$DF84	DB 7	DB 6	DB 5	DB 4	DB 3	DB 2	DB 1	DB 0	DDRB - Data Direction Register Port B
Value:	0	1	1	1	1	1	1	1	0=Input, 1=Output ($7F)
$DF85	DC 7 -	DC 6 -	DC 5 -	DC 4 M 4	DC 3 M 3	DC 2 M 2	DC 1 M 1	DC 0 M 0	(Mode 0: DDRC - Data Direction Register Port C) Mode 1: Interrupt Mask Register
Value:	-	-	-	0	1 DIR	1 EOS	0	0	(Mode 0: 0=Input, 1=Output) Mode 1: 0=Mask, 1=Enable
$DF86	CB 1	CB 0	CA 1	CA 0	IE 4	IE 3	IP	MC	CR - Control Register
Value:	1	X	1	X	0 H->L	1 L->H	X	1 Mode 1	MC=Mode Control, IP=Priority Operation, IE=Edge Selection (for IE 0 .. 2 always H->L)
	0	0	0	0	CA, see Datasheet		CB, see Datasheet		The outputs CA (PC6) and CB (PC7) are controlled by this Register. CA is controlled by CA 0 and CA 1 CB is controlled by CB 0 and CB 1 CA 1 and CB 1 are always 1. Therefore the output CA = CA 0 and CB = CB 0.
	0	1	0	1	CA pulses Low after reading PRA		CB pulses Low after writing PRB
	1	0	1	0	CA = Low		CB = Low
	1	1	1	1	CA = High		CB = High
$DF87	-	-	-	AI 4	AI 3	AI 2	AI 1	AI 0	AIR - Active Interrupt Register
Value:	-	-	-	0	DIR	EOS	0	0

PA 6 + PC 2: (= /EOS of T6721, End Of Speech)
LOW: End of Speech (LOW for one Frame only, about 10 or 20ms)
HIGH: No voice is synthesized


PA 7 + PC 3: (= DIR of 40105, Data In Ready)
LOW: FIFO is full/busy
HIGH: FIFO is ready to accept data


CA (PC6): (= )

CB=High, CA=Low, access RAM
CB=High, CA=High, access EPROM


CB (PC7): (= /EXROM)



Note: http://www.c64forum.de/wbb2/thread.php?threadid=5049


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Copyright © 2006-2013 Stefan Uhlmann - Aktualisiert: 10. August 2013 -