| C64-Adresse |
Bit 7 |
Bit 6 |
Bit 5 |
Bit 4 |
Bit 3 |
Bit 2 |
Bit 1 |
Bit 0 |
Bemerkung |
| $DF80 |
PA 7 |
PA 6 |
PA 5 |
PA 4 |
PA 3 |
PA 2 |
PA 1 |
PA 0 |
PRA - Port Register A |
| Function: |
Status
DIR |
Status
/EOS |
/GAME |
SI |
D3 |
D2 |
D1 |
D0 |
OUT: D0..D3 Data through 40105/LA05 to T6721 (highest Nibble first)
OUT: SI = Shift in to FIFO (L->H "Pretty Please")
IN: /GAME of the MV-Modulport
IN: /EOS = End of Speech from T6721
IN: DIR = Data in Ready from 40105 |
| |
| $DF81 |
PB 7 |
PB 6 |
PB 5 |
PB 4 |
PB 3 |
PB 2 |
PB 1 |
PB 0 |
PRB - Port Register B |
| Function: |
/EXROM |
? |
? |
/WR |
D3 |
D2 |
D1 |
D0 |
OUT: D0..D3 Data to T6721 (highest Nibble first)
OUT: /WR to T6721 (L->H "Pretty Please")
OUT: ? PB 5
OUT: ? PB 6
IN: /EXROM of the MV-Modulport |
| |
| $DF82 |
(PC 7)
CB |
(PC 6)
CA |
(PC 5)
/IRQ |
(PC 4)
IL 4 |
(PC 3)
IL 3 |
(PC 2)
IL 2 |
(PC 1)
IL 1 |
(PC 0)
IL 0 |
(Mode 0: PRC - Port Register C)
Mode 1: Handshake and Interrupt Latches |
| Function: |
/EXROM |
0=RAM
1=EPROM |
C64
/NMI |
- |
Data in Ready |
End of Speech |
- |
- |
Bit 0..4 Interrupt Inputs, Bit 5..7 Outputs
IN: /EOS
IN: DIR
OUT: /NMI (automatically generated if /EOS or DIR occurs)
OUT: ? CA
OUT: /EXROM of the C64-Port |
| |
| $DF83 |
DA 7 |
DA 6 |
DA 5 |
DA 4 |
DA 3 |
DA 2 |
DA 1 |
DA 0 |
DDRA - Data Direction Register Port A |
| Value: |
0 |
0 |
0 |
1 |
1 |
1 |
1 |
1 |
0=Input, 1=Output ($1F) |
| |
| $DF84 |
DB 7 |
DB 6 |
DB 5 |
DB 4 |
DB 3 |
DB 2 |
DB 1 |
DB 0 |
DDRB - Data Direction Register Port B |
| Value: |
0 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
0=Input, 1=Output ($7F) |
| |
| $DF85 |
DC 7
- |
DC 6
- |
DC 5
- |
DC 4
M 4 |
DC 3
M 3 |
DC 2
M 2 |
DC 1
M 1 |
DC 0
M 0 |
(Mode 0: DDRC - Data Direction Register Port C)
Mode 1: Interrupt Mask Register |
| Value: |
- |
- |
- |
0 |
1
DIR |
1
EOS |
0 |
0 |
(Mode 0: 0=Input, 1=Output)
Mode 1: 0=Mask, 1=Enable |
| |
| $DF86 |
CB 1 |
CB 0 |
CA 1 |
CA 0 |
IE 4 |
IE 3 |
IP |
MC |
CR - Control Register |
| Value: |
1 |
X |
1 |
X |
0
H->L |
1
L->H |
X |
1
Mode 1 |
MC=Mode Control, IP=Priority Operation,
IE=Edge Selection (for IE 0 .. 2 always H->L) |
|
0 |
0 |
0 |
0 |
CA, see Datasheet |
CB, see Datasheet |
The outputs CA (PC6) and CB (PC7) are controlled by this Register.
CA is controlled by CA 0 and CA 1
CB is controlled by CB 0 and CB 1
CA 1 and CB 1 are always 1. Therefore the output CA = CA 0 and CB = CB 0. |
|
0 |
1 |
0 |
1 |
CA pulses Low after reading PRA |
CB pulses Low after writing PRB |
|
1 |
0 |
1 |
0 |
CA = Low |
CB = Low |
|
1 |
1 |
1 |
1 |
CA = High |
CB = High |
| |
| $DF87 |
- |
- |
- |
AI 4 |
AI 3 |
AI 2 |
AI 1 |
AI 0 |
AIR - Active Interrupt Register |
| Value: |
- |
- |
- |
0 |
DIR |
EOS |
0 |
0 |
|
Schaltplan (30 KB)
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